Fault tree analysis is one of many symbolic "analytical logic techniques" found in operations research, system reliability analysis, risk analysis and other disciplines. A fault tree diagram follows a top-down structure and represents a graphical model of the pathways within a system that can lead to a foreseeable, undesirable loss event (or a failure). The pathways interconnect contributory events and conditions using standard logic gates (AND, OR, etc). Analysts may wish to use fault trees in combination with reliability block diagrams for system analysis. Fault trees may also be useful for analyzing the effects of individual failure modes and in conjunction with FMEA.
BlockSim supports an extensive array of reliability block diagram (RBD) configurations and fault tree analysis (FTA) gates and events, including advanced capabilities to model complex configurations, load sharing, standby redundancy, phases and duty cycles. Using exact computations and/or discrete event simulation, BlockSim facilitates a wide variety of analyses for both repairable and non-repairable systems. This includes: